1. Field of the Invention
The present invention relates to an automatic gain control circuit which is likely to be integrated on the same chip as mixed (analog and digital) signal processing circuits.
2. Discussion of the Related Art
FIG. 1 shows a conventional automatic gain control circuit. It includes a variable gain amplifier 10 having a gain control input G. The gain of amplifier 10 is set by the voltage applied to the control input G. Often, especially in noisy environments, the input signal Vin to amplifier 10 and the gain control input G are differential.
An automatic gain control loop includes a peak detector 12 receiving the output Vout of amplifier 10, and an integrator 13 which receives the output of peak detector 12 and controls the gain of amplifier 10.
The integrator could have a differential output for driving the differential control input G of amplifier 10. However, such a differential integrator would need at least one high value integrating capacitor having both its terminals connected to variable signals. This high value capacitor is usually not integrable, whereby an integrated circuit including the automatic gain control circuit would need two additional pins for connecting the high value capacitor externally.
With the type of integrator shown in FIG. 1, the integrated circuit only needs one pin 14 for connecting the external integrating capacitor C. The integrator shown includes a transconductance amplifier 16 receiving the output of peak detector 12 on a non-inverting input (+) and receiving a reference voltage Vref1 on an inverting input (-). The output of the transconductance amplifier 16 is connected to a first terminal of capacitor C through pin 14 and to an inverting terminal g- of the differential gain control input of amplifier 10. The non-inverting terminal g+ of the gain control input receives a constant reference voltage Vref2. The other terminal of capacitor C is connected to an analog ground AGND.
Usually, the automatic gain control circuit of FIG. 1 is integrated on the same chip as digital circuits 18 which, for example, carry out a digital processing of the output Vout of amplifier 10. These digital circuits have a digital ground DGND which is in principle not connected to the analog ground AGND. However, digital noise caused by the high frequencies used in the digital circuits 18, inevitably couples into the analog ground AGND. This digital noise affects the gain control input G of amplifier 10 through capacitor C and causes distortion of the output signal Vout.
Capacitor C happens to be the only path through which the digital noise can affect the circuit. Any other path coupled to ground has noise canceling abilities. For example, the digital noise in the power supply lines (not shown) is canceled by the power-supply rejection ratio (PSRR) of amplifiers 10 and 16. The reference voltages Vref1 and Vref2 are provided by low-noise voltage sources (not shown), which can be considered as not coupled to ground.
One solution to avoid digital noise affecting the circuit would be to use an integrator 13 with a differential output for driving the gain control input G of amplifier 10 in differential mode. However, as previously explained, the external capacitor C would have to be connected by two integrated circuit pins instead of only one.
Another solution would be to connect capacitor C to a low impedance low-noise voltage source, instead of to ground AGND. Here, two pins would again be necessary for connecting external capacitor C.